In the processing of integrated circuits, electric contact must be made to isolated active device regions formed within a wafer/substrate. The active device regions are connected by high electrically conductive paths or lines which are fabricated above an electrically insulative material, which covers the substrate surface. To provide electrical connection between the conductive path and active-device regions, an opening in the insulator is provided to enable the conductive films to contact the desired regions. Such openings are typically referred to as contact openings, or simply as "contacts". The term also applies to any opening provided in an insulating layer to make electrical connection to a lower elevation conductive node. The contacts are typically filled with a highly conductive material, with the resultant construction constituting a plug within the contact opening.
Further, multi-level metalization is a critical area of concern in advanced semiconductor fabrication where designers continue to strive for circuit density maximization. Metalization interconnect techniques typically require electrical connect between metal layers or runners occurring at different elevations within a semiconductor substrate. Such is typically conducted, in part, by etching a contact opening through insulating material to the lower elevation metal layer. Increased circuit density has resulted in narrower and deeper electrical contact openings between layers within the substrate. Adequate contact coverage within these deep and narrow contacts continues to challenge the designer.
The electrically conductive filling material utilized for filling contact openings typically comprises conductively doped polysilicon or metal. In the context of this document, "metal" is intended to broadly define any metal alloy, elemental metal, or metal compound whose electrically conductive properties are defined by a resistivity less than 2000 microohm-cm. Further, combinations of these materials are often used. For example, metal or metal compounds are typically utilized within contact openings to provide suitable interconnection and barrier layers between underlying substrates and overlying conductive materials.
As contact openings become narrower and deeper, it becomes more difficult for the artisan to completely fill the contact openings. One preferred method of depositing polysilicon in a manner having high conformality is by chemical vapor deposition. In such processes, reactive gases are combined within a chemical-vapor deposition reactor under conditions effective to deposit a desired film, such as silicon, atop the wafer and conformally within deep contact openings. One typical process for depositing polycrystalline silicon includes feeding of silane gas to a reactor with the substrate maintained at a temperature of 650.degree. C., with the reactor ambient being at 80 Torr. Such will provide a highly conformal layer of polycrystalline silicon as-deposited to deep within narrow contact openings. However, such polysilicon as-deposited will effectively function as an electrically insulative material. Polysilicon can be rendered electrically conductive by providing conductivity enhancing impurity dopants into the layer either during or after deposition. One after-deposition technique is by ion implantation. However, this technique is largely ineffective for doping material within a long, deep contact opening.
Doping can be provided in situ by combining dopant impurity gases with the silane or other silicon precursor gas during the deposition process. The typical average concentration of dopant impurity required to produce adequate electrical conductivity exceeds 1.times.10.sup.20 atoms/cm.sup.3. However unfortunately, conformality in the deposition diminishes significantly in in situ processes which provide dopant impurity concentration of higher than 5.times.10.sup.18 atoms/cm.sup.3.
The problem is illustrated in FIG. 1. There, a semiconductor wafer fragment 10 includes a bulk silicon substrate 12, a field effect transistor gate construction 14 and adjacent source/drain diffusion regions 16 and 18. An insulating layer 20, or other suitable contact opening molding layer, is provided outwardly of substrate 12 over gate 14 and diffusion regions 16 and 18. A contact opening 22 is cut therethrough for outwardly exposing and making electrical connection with diffusion region 18. A layer 24 of polysilicon having conductivity enhancing impurity dopant of greater than or equal to about 5.times.10.sup.18 atoms/cm.sup.3 is deposited atop molding layer 20 to within contact opening 22. However due to the high dopant concentration, contact opening 22 is less than completely filled, leaving an undesired void or key-hole 25 therewithin.
It would be desirable to develop alternate processes which enable provision of heavily doped polysilicon or other semiconductive material plugs within contact openings having a conductivity dopant impurity concentration of greater than 5.times.10.sup.18 atoms/cm.sup.3 which are free of such voids .